Experis is at the momment seeking for Analog Lay-out Design Engineer on Wed, 25 Sep 2013 14:24:15 GMT. Analog Layout Engineer must be able to: do full custom analog and mixed signal circuits in a sub-micron BiCMOS design and CMOS design be able to do floor planning - be proficient running full verification including DRC & LVS - (Design Rule Checks & Layout vs. Schematic Checks) Use Cadence design software Use Assura Verification tools or something similar Good to have experience using Cadence 5 & 6...
Read more »
0 comments:
Post a Comment